1. Field of the Invention
The present invention relates to a method of forming a thin film transistor, and more particularly, to an etchant for etching metal wiring layers and a method for forming a thin film transistor by using the same. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for etching at least two different metal layers at the same time.
2. Discussion of the Related Art
Generally, a liquid crystal display (LCD) displays a picture by controlling light transmittance of liquid crystal cells in accordance with video signals. An active matrix type liquid crystal display, in which a switching device is provided with each liquid crystal cell, among the liquid crystal displays is suitable to display a moving picture. A thin film transistor (TFT) is mainly used as a switching device in the active matrix type liquid crystal display.
On the other hand, TFT's are divided into one of stagger, coplanar, and self-aligned types in accordance with a three-electrode structure. The stagger type is further divided into an inverted stagger type and a normally stagger type. Herein, the inverted stagger type is the most common type.
Being so widely used in many areas, a TFT as a switching device in the liquid crystal display will be discussed in the present invention. Also, only a gate electrode of the inverted stagger type TFT will be described herein, so that a detailed description on a source electrode and a drain electrode will be omitted.
FIGS. 1A to 1C are cross-sectional views illustrating a related art process of forming a gate electrode of a TFT.
Referring to FIG. 1A, a copper (Cu) layer for a first gate metal 12 is deposited onto a substrate 10 with a thickness in the range of about 1500 and 2000 Å. A tantalum (Ta) layer for a second gate metal 14 of a thickness in the range of about 500 and 1000 Å is deposited on the first gate metal 12. Then, the second gate metal 14 is etched by using a pattern to form a second gate pattern 14a, as shown in FIG. 1B.
Subsequently, the first gate metal 12 is etched by using a pattern to form a first gate pattern 12a, as shown in FIG. 1C. Herein, a gate electrode is formed as a bilayer structure, that is, a copper/tantalum (Cu/Ta) layer structure to prevent damage on the gate electrode in a later process. More specifically, a metal having an excellent electric conductivity is used as the first gate pattern 12a, and a metal for preventing ions of the first gate pattern 12a from being diffused at a high temperature in a later process is used as the second gate pattern 14a. In this process, the first gate pattern 12a is etched by wet-etching, and the second gate pattern 14a is etched by dry-etching.
The second gate pattern 14a acts as a diffusion barrier layer. Molybdenum (Mo), which is not easily etched, may be used to prevent the defect caused by a later etching process.
FIG. 2 is a cross-sectional view of a gate electrode of a TFT, wherein molybdenum (Mo) is used as a second gate pattern 16. A first gate pattern 12b of copper (Cu) is formed on a substrate 10, and a second gate pattern 16 is formed on the first gate pattern 12b. Herein, the first and second gate patterns 12b and 16 are processed by a single-step etching process.
The gate electrode of the related art TFT is formed by either a two-step etching process when tantalum (Ta) is used as the diffusion barrier layer, or a single-step etching process when molybdenum (Mo) is used as the diffusion barrier layer. However, it is difficult to have a uniform pattern because their etching ratios are different from that of copper (Cu). As a result, defects occur in the fabrication process.
Also, when copper (Cu) is used as the gate electrode 12 of the related art TFT, the copper (Cu) layer can be easily removed during the etching process, because a single copper (Cu) layer does not have a good adhesion to the TFT substrate 10 when forming the gate electrode 12. Accordingly, a gate wiring defect occurs during the process, thereby resulting in a poor yield.
On the other hand, when copper (Cu) is used as the source electrode and the drain electrode, the copper atom is diffused to an amorphous silicon layer at a temperature higher than about 200° C. and deteriorates the characteristic of a TFT. Consequently, copper (Cu) is hardly used as the source electrode and the drain electrode.